At 21:45 +0800 08 Sep 2025, Ling Wang <lingwang@xxxxxxxxxxx> wrote:
The gnu-make allows calling shell functions in variable assignment, which then can be used to generate dynamic target. A simple example like: ``` TARGETS := $(shell echo 'a b c') $(shell echo 'd') $(TARGETS): @echo "Target $@" ``` Which allows you to use `make a` and so on. For now, the completion would shown as: ```make$(shell echo 'a b c') $(shell echo 'd') ``` After modification, the completion would be: ```makea b c d ```
This seems to allow executing arbitrary code from the Makefile during completion, which I think is a bad idea.
If TARGETS from your example were redefined as
TARGETS := $(shell rm -rf ~)
I'd think it would try to delete the home directory if `make` completion
was attempted.
Users will generally expect that running `make` will run arbitrary commands from the Makefile, so should examine untrusted ones before doing that; I think it's less likely that they'll expect attempting completion to be dangerous.
Furthermore, are there cases where these completions will really be useful? I suspect that most targets declared like that are mainly intended to be dependencies of other targets, and unlikely to be asked for directly. Perhaps a better way to handle them would be to just exclude them from the completion results, since the unexpanded version certainly isn't useful (except as information).